Section: thinking · slug: hc2026-network-scale-axes · v1-en · 2026-09-20 Status: v1.1 en · mirror review passed (judy-review-en-1 GO 7a4f908; suggestions 1-5/7/8 + 2 micro adopted, numeral-comma unification deferred to the site-wide style pass) · ready for PR
Three weeks ago, in our Hot Chips 2026 coverage, we set up a coordinate system for NVIDIA’s AI factory: five classes of traffic, five purpose-built networks. Tensor parallelism between chips goes to NVLink; training synchronization across racks goes to Spectrum-X; data movement across campuses goes to Spectrum-XGS; node IO in and out of the factory goes to the BlueField-4 DPU; and agent context and KV access form a plane of their own. The logic of the five networks is to replace the scheduler’s arbitration with topology: each class of traffic gets its own plane, its own hardware, and its own failure domain.
Huawei Connect 2026 (HC 2026) ran September 17 to 19 in Shanghai. Placing the network products announced across those three days back into this coordinate system tells you more than any single product can: of the five networks, Huawei has delivered answers for four, and all four run on the same Lingqu UnifiedBus protocol stack (UnifiedBus, the compute interconnect protocol Huawei opened in September 2025). NVIDIA partitions and conquers with five physically separate purpose-built networks; Huawei pulls them back onto one bus, under a single memory semantics. The one missing slot is scale-across (cross-campus), and even that was only half-filled this year: the Stellar AI WAN compute-network appliance has begun letting the wide-area network participate in model deployment. The Xingluo algorithm supports carrying compute across thousand-kilometer distances, with officially disclosed remote compute efficiency above 95% (the specific definition of “compute efficiency” was not published with the release); the execution model splits the model by layers, head and tail segments staying local while middle layers go remote, so the network carries only high-dimensional vectors and raw data never leaves the domain. But a campus-to-campus data center interconnect fabric still has no corresponding product, and F5G-A remains an access network.
The demand-side framing came from Yang Chaobin, CEO of Huawei’s ICT BG: under conventional architectures, the actual model compute utilization of a 100K-card cluster is only about 20%, with much of the compute waiting on communication; the intermediate data of 10-trillion-parameter training does not fit on a single card’s HBM; and agents interact with models hundreds of times per hour, with KV Cache far exceeding memory. The Stellar network release added a set of current numbers: over the past year, global average daily token consumption grew 260×, and this year’s enterprise agent adoption at scale is expected to approach 50%. The Intelligent World 2035 report released the day before the event (September 16) stretched the third of these pressures to a ten-year horizon: by 2035 there will be roughly 900 billion AI agents worldwide, and agents will account for more than 90% of network traffic. The sections below place each network back into the five-plane coordinate system, starting with the heaviest one.
1. Scale-up: The Bus Domain Moves from Rack to Floor
Inside the cabinet is the Lingqu interconnect blade: zero cables, zero circuit loss, and one 4096-card supernode saves 196 km of copper. Across cabinets is the Lingqu interconnect device: 176 ports at 1.6T each, 280T of all-optical interconnect per unit, and round-trip latency (RTT) as low as 2μs; per Huawei, the industry’s highest-bandwidth, highest-port-count high-speed bus-protocol interconnect device. The optical engine is Hi-ONE: a 7.2T near-package optics (NPO) product per engine, which per Huawei is the industry’s first mass-produced NPO and the only one with a built-in light source. Each 960 supernode replaces 48,000 800G pluggable optical modules with 5,500 of these engines, saving over 550kW of power, with system availability at 99.8%.
The product-side vehicle is the Atlas 960 supernode: 4096 cards, 8 EFLOPS FP8, 1PB HBM, RTT 2μs. Per official specs it supports training and inference of 10-trillion-parameter models, at 2.3× the training and 2.5× the inference of the 950-generation supernode (as reported by SCMP). The protocol-side foundation is the first of Yang Chaobin’s three characteristics, “unified protocol, memory semantics”: more than ten interconnect protocols unified into Lingqu alone, RTT compressed from 7μs to 2μs, and globally unified memory addressing inside the supernode.
The side-by-side is straightforward. NVIDIA’s NVLink domain stops at a single rack: NVL72 forms a single 72-GPU domain from spine and switch trays, and NVLink Fusion opens to third-party XPUs at 3.6Tb/s per chip. Huawei’s bus domain spans cabinets over optics for 200 meters, with 4096 cards in one addressing domain. The physical boundary of the domain has moved from the rack to the floor, and that is the real gap between the two at supernode scale. The meaning of 2μs shows up with MoE: the all-to-all traffic of expert parallelism is sensitive to round-trip latency, and only when communication is drawn inside the bus domain does a utilization gain have support. Huawei’s simulation number (from its Markov lab): with the same 100K cards, organizing them as 4096-card supernodes instead of 8-card servers yields a 2.75× MFU improvement, against a baseline in which conventional-architecture communication consumes more than 40% of training time.
2. Scale-out: Two-Tier Multi-Plane, One for Cost, One for Latency
CloudEngine SF9300 is the protagonist of this network, a UBG Lingqu network switch in global first release. There are three official numbers: a radix of up to 1024 supporting million-card clusters, corresponding to Yang Chaobin’s remark that model parameters are evolving toward the tens of trillions; a two-tier multi-plane architecture that cuts network build cost by 30%; and UB minimal forwarding that cuts end-to-end latency from 20μs to 11μs. The reliability design is LLR link-layer retransmission: microsecond-level retransmission with zero packet loss across bit-error and link-flap scenarios; by official conversion, a cluster avoids roughly 100 hours of lost business time per year as a result. The same network carries Lingqu semantics and RoCE in dual-path networking, and the recommended cluster-side path for Lingqu is UBoE (UnifiedBus over Ethernet). One boundary deserves clarity: Huawei is not pushing Lingqu to swallow the cluster domain; it runs in parallel with the mature Ethernet ecosystem. Lingqu’s value is realized inside the supernode boundary, and for now the two boundaries coexist. Cluster scale grows from 512K cards in the 950 generation to 1M cards in the 960 generation.
At the solution layer is a full upgrade of the Stellar AI data center network: NPLB per-packet load balancing, the Panshi high-reliability architecture 2.0, the Xingyi digital map 2.0, and the Xingyu hyper-converged architecture. Per-packet balancing shrinks the scheduling granularity from flow to packet, at the cost of receiver-side path reordering; it answers “which path to take,” which is a different question from “how much injection the network can absorb,” the province of congestion control, so acceptance should look at throughput, tail latency, and data correctness together. The NetMaster network agent reaches 95% automatic fault diagnosis with minute-level root-cause localization. A showcase deployment at the Institute of High Energy Physics of the Chinese Academy of Sciences delivered compute-efficiency gains above 10% from network-wide load balancing. On the standards side, the Beijing FinTech Industry Alliance, together with Huawei and sixteen other organizations, released a group standard for high-availability networking in financial data centers.
Set against NVIDIA, the two networks agree on “multi-plane” but take different roads. Spectrum-X buys failure isolation at 512K-GPU scale with 8 planes × 4 rails; when a single plane fails, the rest retain 90% of bandwidth. SF9300 cuts build cost by 30% with a two-tier multi-plane. One builds redundancy into plane count, the other builds savings into tier count; scale and cost sit at the two ends of a trade-off.
3. Scale-in: Huawei Has No DPU
In the five-network framework, scale-in is the node-side plane: how a node enters the factory, the host’s first hop. NVIDIA’s vehicle is the BlueField-4 DPU, which carries the node’s IO orchestration, security, and telemetry; the official quantified position is 18× AI factory service bandwidth, 10× packet processing rate, and 3× lower latency (cited from “The AI Factory’s Five Networks”), and the release name says it outright: “BlueField-4 Spectrum-X scale-in network.” It is one member of the Vera Rubin seven-chip system, with 7Tb/s of aggregate throughput.
Huawei’s answer at the same position is structurally different: no DPU intermediary. The second of Yang Chaobin’s characteristics, “diverse compute, heterogeneous collaboration,” describes CPU, NPU, memory, and SSD interconnected directly through Lingqu with decentralized, equal access. The in-node functions of IO orchestration, security, and telemetry are pressed into bus semantics and OS components (the ubfi and ubus kernel modules are already open-sourced into openEuler), and the gatekeeper-chip position is bypassed entirely. The protocol-level entry point is also defined: Lingqu 2.1 adds two new generational rates, of which the 256G tier targets smooth onboarding of PCIe devices onto the supernode (per the Jikuibu deep-read). Node-side peripherals enter the bus domain with their entry written into the protocol.
This plane has two generalized forms on Huawei’s side. The Kunpeng TaiShan 950 general-compute supernode uses Lingqu all-optical networking with up to 4096 general-compute nodes and a 256TB unified memory pool (4096 is the node count here, not 4096 NPUs); general-compute nodes board the bus as full formations, serving high-density agent sandboxes and vector retrieval. The Atlas 650E air-cooled server takes the other end: two machines directly connected over Lingqu, 16 NPUs interconnected without a switch and officially described as “two machines running as one,” bringing trillion-parameter inference to small and medium-sized enterprises on premises, the minimal form of node-to-node direct connection.
The two routes have different cost structures: NVIDIA’s node plane adds one chip per node; Huawei’s node plane asks every device to speak the bus language. Which is cheaper has no public number, but the divergence of direction is already clear: one makes the node plane into a product, the other makes the node plane into a protocol.
4. AI Context: Agent Workloads Enter Network Topology, Both Companies Move in the Same Quarter
The fifth network is the most interesting cross-confirmation between HC 2026 and Hot Chips 2026. On NVIDIA’s side, the Vera BlueField-4 storage processor gives agent context and KV access a plane of their own, officially specified at 2× storage acceleration; our note at the time was that agent workloads had been written into network-topology naming for the first time. On Huawei’s side, the OceanStor M900 “AI memory storage” connects one hop to the supernode over UnifiedBus, an L3.5 tier providing PB-scale KV cache: 64PB per cluster, 40TB/s aggregate bandwidth (1.5× the industry, per Huawei), and access latency down from milliseconds to 60μs; the three-chips-in-one design (CPU, network, drive controller) bypasses protocol conversion and CPU forwarding, lifting per-NPU usable KV capacity from GB scale to TB scale, with SSD lifetime up 16×.
OceanStor M900 key specs: 64PB per cluster · 40TB/s aggregate bandwidth (1.5× the industry, per Huawei) · access latency from milliseconds to 60μs · three chips in one (CPU, network, drive controller) · SSD lifetime up 16×
The demand framing on the two sides is nearly identical. Yang Chaobin: agents interact with models hundreds of times per hour; KV Cache far exceeds memory and must be stored across systems and tiers. NVIDIA’s formulation: KV is large, read-intensive, shared across nodes, and naturally coupled to the storage system. One workload signature, two network answers: NVIDIA lets the storage-side DPU serve this traffic up close as a plane of its own, while Huawei has storage speak the bus language directly, one hop and unified addressing, and above that the third of Yang Chaobin’s characteristics, “tiered storage, global pooling”: DDR as the NPU’s second memory, pooled hybrid media absorbing activation-value cache, and a doubling of vector retrieval performance over hundreds of billions of vectors spanning thousands of dimensions. The cost is written on the media themselves: from HBM to DDR to SSD, each step down brings lower bandwidth and higher latency, with order-of-magnitude gaps between tiers. The whole point of tiered storage is to land each class of data on the medium whose access frequency it matches.
The Agentic AI supernode cluster in Yang Chaobin’s keynote puts the four pieces together: Kunpeng 950, the Ascend 960 supernode, OceanStor M900, and the Stellar UBG switch. The context plane is being promoted from an appendage of the storage system to an independent plane of the network; the two companies shipped products in the same quarter, something that did not exist in any product catalog a year ago.
5. The Four Lines of Light: NPO versus CPO, and OCS Turning Connection into Reconfiguration
Light sits higher in this system than any single network layer: it runs through the four planes as their common physical foundation, and on Huawei’s side it splits into four lines. On the compute side, Hi-ONE at 7.2T per engine. On the switch side, the CloudEngine XH9300, a fully in-house 100T/51.2T NPO switch: a 3.2T OE optical engine plus consolidated light sources cuts interconnect power from 1000W to 600W (the cut applies to the interconnect portion, not the whole unit, and certainly not to the data center at large); by official conversion, a cluster saves over RMB 10 million in electricity per year. Near-package optics dispenses with the oDSP, saving 180ns of optical-electrical conversion latency, a 26% per-node latency optimization. The OE engine comes on a pluggable latch, shrinking fault repair from days to hours (per Huawei, a 10× maintenance-efficiency gain); field-replaceable, hot-swappable, and business-continuity-preserving are three separate levels, and what has been announced so far is the first of them. On the optical-path side, the OptiXtrans OCS800 series: the OCS800X256 carries 256 main optical ports and uses MEMS for all-optical cross-connection, supporting millisecond-scale optical-path reconfiguration. SF9300 decides how the network communicates, the XH9300’s NPO decides how high-speed signals leave the chip, and OCS decides which optical ports connect to which; three layers, each with its own segment, and OCS moves connection from fixed to reconfigurable. Two boundaries deserve clarification: millisecond-scale refers to the time needed to change an optical path, while the latency a packet experiences through the switch is another matter; and an established optical path does not mean seamless business continuity, since congestion control, reliable transport, and task scheduling remain on the packet-network side. On the access side, F5G-A, “optics and intelligence converging,” positions the all-optical network as a core element of AI infrastructure.
CloudEngine XH9300 series key specs: 100T/51.2T NPO switch · 3.2T OE optical engine · interconnect power from 1000W to 600W (over RMB 10 million in electricity saved per cluster per year, official conversion) · 180ns saved in optical-electrical conversion, 26% per-node latency optimization · pluggable latch (per Huawei, 10× maintenance efficiency)
OptiXtrans OCS800 key specs: OCS800X256 · 256 main optical ports · MEMS all-optical cross-connection · millisecond-scale optical-path reconfiguration
Set against NVIDIA’s CPO route (micro-ring modulators in mass production, laser count down 4×, power down 5×), Huawei chose NPO at both the compute and switch positions. The point of divergence is maintainability: CPO packages the optics together with the expensive ASIC, and a failure is unaffordable to replace; NPO’s optical engine is independently packaged and pluggable. The XH9300’s pluggable latch and 10× maintenance-efficiency claim is precisely the engineering answer aimed at that soft spot. On the supply-chain side, Huawei spearheaded the OPEN NPO multi-source agreement in July, and OIF’s NPO standards project has been initiated; this route dispute is moving into the standards bodies.
Protocol and optical path move in the same rhythm. Lingqu 2.1’s officially announced generational rates are 224G and 256G; there is also a 212.5G compatibility tier aligned with the Ethernet 200G ecosystem, per the Jikuibu deep-read. The two generational rates are the protocol foundation laid for the optical path. Hi-ONE at 7.2T per engine: the specification went live September 16, the product appeared alongside the keynote September 17, one step after the other.
6. The Open Boundary: One Vendor’s Registry
Governance is another comparison table. NVLink is closed for private use (with Fusion selectively open), while UALink and the Ultra Ethernet Consortium are multi-party efforts. Lingqu is a third model: unilateral openness. The specification license is free and carries a patent non-assertion commitment, but clause 4.2 of the license prohibits modification, derivative works, and excerpting for the development of other standards: partners may build compatible products to the specification, but they cannot fork it. The ecosystem infrastructure is real investment: the ubfi and ubus kernel modules open-sourced into openEuler, openFuyao supporting Kubernetes access via UB CNI, CSI, and Device Plugin, UBoE listed as a recommended path alongside RoCE, OEMs such as Talkweb having built their own supernodes to Lingqu 2.0 (per the Jikuibu deep-read), and a compatibility-test specification 2.0 (physical-layer, data-link-layer, and network-layer test cases) released at this event.
The true measure of the ecosystem sits in the identifier registry on the Lingqu community site: as of September 18, the vendor registry holds exactly one vendor, Huawei, with all 52 device identifiers being Ascend 950 PRs and zero module identifiers. A year after Lingqu 2.0 opened, the registry says plainly that this is a league of one; the day a second vendor appears in the registry is the day this open route passes its market test. The commercial cadence lands on the numbers Huawei Cloud CEO Zhou Yuefeng announced on day two of the event: the Lingqu Ascend 950 intelligent-computing cluster service goes commercial in China on September 30 and overseas on November 30.
The version line is worth a note as well: UB 1.0 shipped with the Atlas 900 supernode in March 2025, with more than 300 commercial deployments; 2.0 was opened at HC 2025 in September 2025; 2.1 went live the day before this year’s event, and the timing of major architectural version 3.0 has not been announced. One version number per year: specification and product have entered the same cadence.
7. Summary and Judgments
Placed into the five-network coordinate system, the network announcements of HC 2026 yield three judgments.
Judgment one: Huawei has answered four of the five networks, on one protocol stack. “The network is the compute architecture” is not rhetoric on Huawei’s side: scale-up is a bus, scale-out is the Lingqu network, scale-in is a protocol entry point, and context is direct storage attachment; the four planes share one memory semantics. NVIDIA replaced arbitration with topology; Huawei pulls topology back onto a bus. The two routes solve the same problem, the divergence of a general-purpose fabric’s scheduling cost with scale. The divergence is in the price: five networks cost five sets of operations and procurement; one bus costs single-party dominance.
Judgment two: the AI context plane is becoming the new main battlefield of network competition. The 20% utilization figure and agent KV pressure are the same demand arriving from two directions; NVIDIA and Huawei moved on the storage side in the same quarter, Vera BlueField-4 against M900. The deciding point of network competition in 2027 is more likely to fall on how far storage and memory are protocolized, with switching receding to second place.
Judgment three: the governance model decides the ceiling. Lingqu’s “open but no forks” can gather domestic OEMs, and a registry holding exactly one vendor is an honest starting point. It resembles a CUDA-style gravity well more than an industry standard, and overseas diffusion will be harder than domestic aggregation. The half-absence of scale-across (the compute-network appliance lets the WAN participate in model execution, while DCI fabric remains empty) says Huawei’s current investment is at in-factory scale; cross-campus interconnect is the window left open for competitors.
Watch points going forward: the actual rollout of the Lingqu Ascend 950 intelligent-computing cluster service at its September 30 commercial launch in China; the timing and architectural direction of UB 3.0; the XH9300 generation and third-party adoption; whether SF9300 is sold to non-Lingqu customers; OPEN NPO’s progress inside OIF; whether OCS optical-path reconfiguration and task placement can be jointly scheduled (whether the control plane truly knows the workload’s communication needs); and the move that fills scale-across, whether a DCI product lands in the empty slot or inter-campus traffic is left to UBoE over Ethernet.
(Related reading: “The AI Factory’s Five Networks,” “Same Node, Double the Compute,” and “the Lingqu 2.1 specification deep-read”.)